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DDR memory controller IP that can bring out the best performance in the industry.
Loputo MEMC IP core is a memory controller IP that can achieve the industry's highest-class DRAM data transfer performance. Maximizing the SoC performance is possible by minimizing the latency of the internal BUS of SOC and memory access in combination with Loputo BUS.
|Supported Standards||DDR 2 / 3 / 4, LPDDR 2 / 3 / 4|
|SoC BUS I/F||AXI4, AXI3, APB, OCP|
|Supported Devices||ASIC / ASSP / SoC / FPGA|
|Supported Applications||Smartphones, Tablets, In-vehicle devices, TVs, Game consoles, MFPs, Amusement devices, Degital cameras, etc.|